Bus fixes and minor improvements to the web interface.

Implementation of services for system load monitoring and automated control (for internal use).

New integrated toolchain. Improvements in the Verilog compiler and more detailed error reporting.

New web-based emulation platform. No installation, no hassle.

Support for more robust and complex Verilog projects. Launch of the Pitanga virtual cell library.

Introducing a new way to prototype digital circuits without an FPGA at the 56th International Symposium on Circuits and Systems in Monterey, California.

inPlace, in collaboration with UFRGS, files four invention patents with INPI.

The Pitanga platform has been selected for a live demonstration at the 56th International Symposium on Circuits and Systems in Monterey, California.